TABLE OF CONTENTS Shift registers (SRs) are very simple circuits used for storing and manipulating data. As illustrated in Figure 14.1, they consist of one or more strings of serially connected D-type flip-flops (DFFs). In Figure 14.1(a), a four-stage single-bit SR is shown, while in Figure 14.1(b) a four-stage N-bit SR is depicted.
The operation of an SR is very simple: Each time a positive (or negative, depending on the DFF) clock transition occurs, the data vector advances one position. Hence in the case of Figure 14.1 (four stages), each input bit ( d) reaches the output ( q) after four positive clock edges have occurred.
Four applications of SRs are illustrated in Figure 14.2. In Figure 14.2(a), the SR operates as a serial-in parallel-out (SIPO) memory. In Figure 14.2(b), an SR with a programmable initial state is presented ( load = 1 causes x = x 0 x 1 x 2 x 3 to be loaded into the flip-flops at the next positive edge of clk, while load = 0 causes the circuit to operate as a regular SR). This circuit also operates as a parallel-in serial-out (PISO) memory. In Figure 14.2(c), a circular SR is depicted. Note that rst is connected to rst of all DFFs except for the last, which has rst connected to its preset ( pre) input. Therefore, the rotating sequence is fixed and...
