TABLE OF CONTENTS Objective: Chapter 20 showed VHDL designs for combinational logic circuits. The second and final part of combinational circuits is presented in this chapter, which exhibits VHDL designs for Combinational alarithmetic circuits (studied in Chapter 12).
Chapter Contents
| 21.1 | Carry-Ripple Adder |
| 21.2 | Carry-Lookahead Adder |
| 21.3 | Signed and Unsigned Adders/Subtracters |
| 21.4 | Signed and Unsigned Multipliers/Dividers |
| 21.5 | ALU |
| 21.6 | Exercises |
In this section and in the next, the physical structures of adders/subtracters are explored, while in Section 21.3 the types of addition/subtraction (that is, unsigned or signed) are considered.
Adders are Combinational alarithmetic circuits, studied in Sections 12.2 and 12.3. of all multibit adders, the carry-ripple adder (seen in Figure 12.3, partially repeated in Figure 21.1 below) is the simplest one (it has the least amount of hardware). Even though we have already illustrated this type of design in Example 19.7, it is included here for completeness and also to show its design without using the COMPONENT construct (showing such construct was the purpose of Example 19.7).
To implement this structural design, it is important to recall this adder's equations, given in Section 12.2, that is:
s = a ? b ? cin
cout = a-b + a. cin + b.cin
A corresponding VHDL code is shown below, with the expressions above appearing in lines 20-22. Note that N is a generic parameter (line 6). To create N instances of...
